1. Field of the Invention
The present invention relates to an image display device for performing display of information such as a image by switching elements and pixels arranged in a matrix state (an active matrix image display device). More particular, the present invention relates to a digital type driving method, and to an image display device having the digital type driving method.
2. Description of the Related Art
Techniques of manufacturing a semiconductor device formed of a semiconductor thin film on a low cost glass substrate, for example a thin film transistor (TFT), have been rapidly developing recently. This is because the demand for active matrix liquid crystal display devices, one type of active matrix image display device, has risen.
In addition, active matrix EL display devices (hereafter referred to as EL display devices), one type of active matrix image display device using a self-illuminating electroluminescence (EL) element, are being actively researched.
An active matrix liquid crystal display device as a typical example of an active matrix image display device, is explained below.
As shown in FIG. 40, an active matrix liquid crystal display device has a source signal line driver circuit 101, a gate signal line driver circuit 102, and a pixel array portion 103 arranged in a matrix state. The source signal line driver circuit 101 samples an input image signal synchronously with a timing signal, such as a clock signal, and writes data to source signal lines 104. The gate signal line driver circuit 102 selects gate signal lines 105 in order and synchronously with a timing signal, such as a clock signal, and controls TFTs 106, which are switching elements within each pixel of the pixel array portion 103, to be on or off. Thus the data written into each source signal line 104 is written in order to each pixel.
There are analog type and digital type methods of driving the source signal line driver circuits, and a digital active matrix liquid crystal display device capable of high definition and high speed operation has been gaining attention.
A conventional digital source signal line driver circuit is shown in FIG. 41. Reference numeral 201 denotes a shift register portion in FIG. 41, and is composed of basic shift register circuits 202 containing circuits such as flip flop circuits. A sampling pulse is sent in order to latch 1 circuits (LAT1) 203 synchronously with a clock signal CLK when a start pulse SP is input to the shift register portion 201.
The latch 1 circuits (LAT1) 203 store in order n-bit digital image signals (where n is a natural number) supplied from a data bus line DATA synchronously with the sampling pulse from the shift register portion.
After one single horizontal pixel portion signal is written to the LAT1 group, the signals stored in each latch 1 circuit (LAT1) 203 are output at the same time to latch 2 circuits (LAT2) 204 synchronously with a latch pulse sent from a latch signal bus line LP.
The start pulse SP is again input when the digital image signal is stored in the latch (2) circuits (LAT2) 204, and the digital image signal for the next pixel row portion is newly written into the LAT1 group. At this point the previous pixel row portion of the digital image signal is stored in the LAT2 group, and an analog image signal corresponding to the digital image signal, in accordance with a D/A conversion circuit (digital/analog signal conversion circuit) 205, is written to each source signal line.
A voltage which has its polarity inverted each frame in order to increase reliability is imparted to a liquid crystal in driving the liquid crystal display device, an AC driving method. In order to prevent flicker in the AC driving method, there are: a gate line inverting driver which performs polarity inversion of the voltage written into the source signal lines for each single gate signal line; a source line inverting driver which writes a polarity inverted voltage for each single source signal line; and a dot inversion driver for writing a voltage which has its polarity inverted in units of one pixel in the horizontal and vertical directions.
Two systems of a plurality of grey-scale electric power supply lines for supplying the D/A conversion circuit 205 are shown in FIG. 41. Vref(+) with a positive polarity, and Vref(−) with a negative polarity, are the grey-scale electric power supply lines for outputting from each D/A converter circuit. Provided that there is a connection like that shown in FIG. 41, a voltage possessing a positive polarity is input to a first source signal line SL1, a voltage possessing a negative polarity is input to a second source signal line SL2, a voltage possessing a positive polarity is input to a third source signal line SL3, and a voltage possessing a negative polarity is input to a fourth source signal line SL4. Note that, if the polarity of the electric power supply voltage of the grey-scale electric power supply lines has its polarity inverted each frame in this state, then the source signal line driver circuit shown in FIG. 41 performs source line inversion driving. Further, provided that the electric power supply voltage of the grey-scale electric power supply lines has its polarity inverted for each gate signal line, then the source signal line driver circuit shown in FIG. 41 performs dot inversion driving.
Further more, differing from FIG. 41, provided that the electric power supply voltage of the grey-scale electric power supply lines has its polarity inverted for each gate signal line by only the input of one system of grey-scale power supply lines, then gate line inversion driving is performed (not shown in the figure).
The D/A converter circuits of FIG. 41 each drive one source signal line. However, when producing a high resolution, high definition liquid crystal display device, making the same number of D/A converter circuits which occupy a large surface area as the number of source signal lines is an impediment to reducing the size of the liquid crystal display device, desirable in recent years. A method of driving a plurality of source signal lines by one D/A conversion circuit has been proposed by Japanese Patent Application Laid-open No. Hei 11-167373.
An example of a composition of a source signal line driver circuit for driving four source signal lines by using one D/A conversion circuit is shown in FIG. 42. As is understood by comparing with FIG. 41, a parallel/serial converter circuit (P/S converter circuit) 301, a source signal line selection circuit 302, and a selection signal (SS) input to these circuit have been newly added. In spite of the addition of these circuits, provided that four source signal lines can be driven by one D/A conversion circuit, the effect of reducing the required number of D/A converter circuits to one-fourth has a large effect, and it becomes possible to reduce the surface area occupied by the source signal line driver circuit.
Even with this type of driving method in which a plurality of source signal lines are driven by one D/A converter circuit, it is necessary to perform AC driving of the liquid crystal, as stated above. With a conventional way of thinking, each D/A conversion circuit always outputs the same polarity during at least one horizontal write-in period. Accordingly, with a method of driving a plurality of source signal lines by one D/A converter circuit, the gate line inverting driver or the frame inverting driver was employed as the AC driver of the liquid crystal.
An explanation of the problem point associated with the conventional thinking of using the source line inverting driver or the dot inverting driver as a method of driving a plurality of source signal lines by one D/A converter circuit is made here using FIG. 43. A specific example of a case of driving four source signal lines by one D/A converter circuit is shown in FIG. 43. Similar to FIG. 41, grey-scale electric power supply lines are connected to adjacent D/A converter circuits so that the polarity of output from the D/A converter circuits is inverted, the polarity is inverted every four source signal lines, and it does not become a complete source line inverting driver. Similarly, it does not become a complete dot inverting driver. This cannot be considered sufficient provided that a high quality image is sought. Thus a novel driving method needs to be constructed in order to perform a method of source line inverting drive or a method of dot inverting drive when one D/A conversion circuit drives a plurality of source signal lines.